Current network processors (NPs) are VLSI-devices dedicated to high-speed packet forwarding. While their architectures are optimized for high throughput rates, they normally disregard protocol-processing delays which result from data dependencies inherent to encapsulated protocol-layers. The key to overcome this limitation is to speculalively dissolve these dependencies and to allow an accelerated control-path processing. This paper comprises the entire framework of a speculative NP conception, implementation and evaluation. Besides an generic evaluation, the benefit of the system is shown by system simulation. Utilizing the approach, a latency reduction of up to 14.9 percent can be achieved compared to traditional implementations.
|Title of host publication||Third IEEE International Symposium on Network Computing and Applications, 2004. (NCA 2004). Proceedings.|
|Number of pages||8|
|Publication status||Published - 01.12.2004|
|Event||3th IEEE International Symposium on Network Computing and Applications - Cambridge, United States|
Duration: 30.08.2004 → 01.09.2004
Conference number: 64724