Abstract
Partially reconfigurable hardware accelerators enable the offloading of computative intensive tasks from software to hardware at runtime. Beside handling the technical aspects, finding a proper reconfiguration point in time is of great importance for the overall system performance. Determination of a suitable point of reconfiguration demands the evaluation of performance degradation during runtime reconfiguration and expected performance benefit after reconfiguration. Three different approaches to determine a proper point of reconfiguration are discussed. Delays and weighted transitions are used to reduce the number of reconfigurations while keeping system performance at a maximum. Evaluation is done with a simulation model of a runtime reconfigurable network coprocessor. Results show that the number of reconfigurations can be reduced by about 35% for a given application scenario. By optimizing runtime reconfiguration decisions, the overall system performance is even higher than compared to pure threshold based reconfiguration decision schemes.
| Original language | English |
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| Title of host publication | 2010 IEEE/IFIP International Conference on Embedded and Ubiquitous Computing |
| Number of pages | 8 |
| Publisher | IEEE |
| Publication date | 01.12.2010 |
| Pages | 39-46 |
| Article number | 5703496 |
| ISBN (Print) | 978-1-4244-9719-5 |
| ISBN (Electronic) | 978-0-7695-4322-2 |
| DOIs | |
| Publication status | Published - 01.12.2010 |
| Event | IEEE/IFIP 8th International Conference on Embedded and Ubiquitous Computing - Hong Kong, Hong Kong Duration: 11.12.2010 → 13.12.2010 Conference number: 83896 |
