Abstract
This paper describes how to enrich a System-on-Chip (SoC) design by flexible monitoring capabilities allowing to analyze the system's execution for ensuring safety requirements. To this end, a general SoC architecture is described enriched by observation means. Moreover, it is described how verification properties expressed in a temporal stream-based specification language can be translated into a monitor expressed in a hardware description language (Verilog) checking the underlying property. Finally, the link between the SoC and the monitoring unit is explained. Overall, a self-observing system is obtained that works coherently with the SoC.
Original language | English |
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Journal | Ada User Journal |
Volume | 39 |
Issue number | 4 |
Pages (from-to) | 296-299 |
Number of pages | 4 |
ISSN | 1381-6551 |
Publication status | Published - 12.2018 |