Abstract
Modern multicore microcontrollers for systems with hard real-time requirements increasingly use a complex memory hierarchy to improve available performance and distribute competing accesses to separate memories. With the additional computing power available, the complexity of the implemented software has also increased. These two factors make an optimized distribution of the existing software to the available memory an increasing problem for the integration into such systems. Therefore, this article presents an algorithm that calculates an optimized memory distribution based on the microcontroller used, a recording of the code execution on the target hardware, a system description and automatically generates the corresponding linker script.
| Original language | English |
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| Title of host publication | 2019 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC) |
| Publisher | IEEE |
| Publication date | 10.2019 |
| Article number | 8906914 |
| ISBN (Print) | 978-1-7281-2770-5 |
| ISBN (Electronic) | 978-1-7281-2769-9 |
| DOIs | |
| Publication status | Published - 10.2019 |
| Event | 5th IEEE Nordic Circuits and Systems Conference - Helsinki, Finland Duration: 29.10.2019 → 30.10.2019 Conference number: 155051 |
