Hardware-aided update acceleration in a hybrid Semantic Web database system

In this paper, we focus on update optimizations in a Semantic Web database system aided by a field programmable gate array (FPGA). Many databases utilize B⁺-tree index structures for querying data. In this scenario, the B⁺-tree levels are distributed between the host system with the lower inner levels including the leaves and the FPGA with the upper inner levels including the root. In this way we can perform a parallel search inside the nodes of the FPGA by exploiting its parallel nature. Since update operations presuppose a search for the correct position inside a B⁺-tree leaf, these operations can benefit from these parallel searches. We present our scheduler ideas to estimate the expected benefit against the setup of the system and further adjustments made necessary by performed updates. In a best, average and worst-case scenario, we show how our scheduler would calculate the possible acceleration of such a system.