Hardware-accelerated pose estimation for embedded systems using Vivado HLS

J. M. Joseph, T. Winker, K. Ehlers, C. Blochwitz, T. Pionteck


The focus of this work is to facilitate pose estimation and, thus, gesture recognition for embedded systems, although these are tasks with high computational performance requirements. Therefore, an existing pose estimation algorithm is optimized for Xilinx High Level Synthesis (HLS). The resulting hardware acceleration cores are compared for different optimizations and, finally, we propose a hardware/software system design for a Xilinx Zynq Zedboard. Using this method, we achieve a speedup of 1.6 in comparison to a software solution on the ARM processor and, thus, facilitate hand tracking for embedded systems with low power consumption.
Original languageEnglish
Title of host publication2016 International Conference on ReConFigurable Computing and FPGAs (ReConFig)
Number of pages7
Publication date01.11.2016
Article number126407
ISBN (Print)978-1-5090-3708-7
ISBN (Electronic)978-1-5090-3707-0
Publication statusPublished - 01.11.2016
Event2016 International Conference on Reconfigurable Computing and FPGAs - Cancun, Mexico
Duration: 30.11.201602.12.2016
Conference number: 126407


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