Hardware-accelerated join processing in large Semantic Web databases with FPGAs

S. Werner, S. Groppe, V. Linnemann, T. Pionteck

Abstract

The increasing amount of data to be processed by database systems asks for a continuous increase in processing power. While traditional system designs can hardly cope with these performance requirements, dedicated hardware accelerators provide the required processing power. However, dedicated hardware accelerators are inflexible and cannot be adapted to the requirements of a dedicated query. In this paper, a concept is introduced to improve the performance of a Semantic Web database by developing a flexible FPGA-based hardware accelerator. The feasibility of this approach is shown by implementing different types of join operators as one of the most important and most time consuming operators in query execution. The performance comparison between the proposed FPGA implementation and a software solution in C on a general-purpose processor shows a significant speed-up up to 10 times.
Original languageEnglish
Title of host publication2013 International Conference on High Performance Computing Simulation (HPCS)
Number of pages8
PublisherIEEE
Publication date01.07.2013
Pages131-138
Article number6641403
ISBN (Print)978-147990836-3
ISBN (Electronic) 978-1-4799-0838-7
DOIs
Publication statusPublished - 01.07.2013
Event2013 11th International Conference on High Performance Computing and Simulation - Helsinki, Finland
Duration: 01.07.201305.07.2013
Conference number: 100986

Research Areas and Centers

  • Research Area: Intelligent Systems
  • Centers: Center for Artificial Intelligence Luebeck (ZKIL)

DFG Research Classification Scheme

  • 409-04 Operating, Communication, Database and Distributed Systems

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