FPGA-Accelerated Deletion-tolerant Coding for Reliable Distributed Storage

Peter Sobe, Volker Hampel


Distributed storage systems often have to guarantee data availability despite of failures or temporal downtimes of storage nodes. For this purpose, a deletion-tolerant code is applied that allows to reconstruct missing parts in a codeword, i.e. to tolerate a distinct number of failures. The Reed/Solomon (R/S) code is the most general deletiontolerant code and can be adapted to a required number of tolerable failures. In terms of its least information overhead, R/S is optimal, but it consumes significantly more computation power than parity-based codes. Reconfigurable hardware can be employed for particular operations in finite fields for R/S coding by specialized arithmetics, so that the higher computation effort is compensated by faster and parallel operations. We present architectures for an application-specific acceleration by FPGAs. In this paper, strategies for an efficient communication with the accelerating FPGA and a performance comparison between a pure softwarebased solution and the accelerated system are provided.

Original languageEnglish
Title of host publicationARCS 2007: Architecture of Computing Systems - ARCS 2007
Number of pages14
Volume4415 LNCS
PublisherSpringer Verlag
Publication date24.12.2007
ISBN (Print)978-3-540-71267-1
ISBN (Electronic)978-3-540-71270-1
Publication statusPublished - 24.12.2007
Event20th International Conference on Architecture of Computing Systems
- Zurich, Switzerland
Duration: 12.03.200715.03.2007
Conference number: 70800


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