DynaCORE - A Dynamically Reconfigurable Coprocessor Architecture for Network Processors

Carsten Albrecht; Jürgen Foag; Roman Koch; Erik Maehle

doi:10.1109/PDP.2006.30

DynaCORE - A Dynamically Reconfigurable Coprocessor Architecture for Network Processors

Carsten Albrecht, Jürgen Foag, Roman Koch, Erik Maehle

Institute of Computer Engineering

Radiocommunications Systems Division

Abstract

Network processors are special purpose processors, tailored to the needs of packet processing in internet routers. Network processors are, in general, freely programmable devices. However, their performance in payloadprocessing relies on specific tasks to be accelerated by fixed purpose coprocessors which are integrated into the device. As a solution to overcome the restrictions of flexibility, a dynamically adaptable coprocessor based on dynamically and partially reconfigurable logic (DynaCORE) is proposed.

Original language	English
Title of host publication	14th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP'06)
Number of pages	8
Publisher	IEEE
Publication date	26.10.2006
Pages	101-108
Article number	1613259
ISBN (Print)	0-7695-2513-X
DOIs	https://doi.org/10.1109/PDP.2006.30
Publication status	Published - 26.10.2006
Event	14th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing - Montbeliard-Sochaux , France Duration: 15.02.2006 → 17.02.2006 Conference number: 68364

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Albrecht, C., Foag, J., Koch, R., & Maehle, E. (2006). DynaCORE - A Dynamically Reconfigurable Coprocessor Architecture for Network Processors. In 14th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP'06) (pp. 101-108). Article 1613259 ( Euromicro International Conference on Parallel, Distributed, and Network-Based Processing). IEEE. https://doi.org/10.1109/PDP.2006.30

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title = "DynaCORE - A Dynamically Reconfigurable Coprocessor Architecture for Network Processors",

abstract = "Network processors are special purpose processors, tailored to the needs of packet processing in internet routers. Network processors are, in general, freely programmable devices. However, their performance in payloadprocessing relies on specific tasks to be accelerated by fixed purpose coprocessors which are integrated into the device. As a solution to overcome the restrictions of flexibility, a dynamically adaptable coprocessor based on dynamically and partially reconfigurable logic (DynaCORE) is proposed.",

author = "Carsten Albrecht and J{\"u}rgen Foag and Roman Koch and Erik Maehle",

year = "2006",

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Albrecht, C, Foag, J, Koch, R & Maehle, E 2006, DynaCORE - A Dynamically Reconfigurable Coprocessor Architecture for Network Processors. in 14th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP'06)., 1613259, Euromicro International Conference on Parallel, Distributed, and Network-Based Processing, IEEE, pp. 101-108, 14th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing, Montbeliard-Sochaux , France, 15.02.06. https://doi.org/10.1109/PDP.2006.30

DynaCORE - A Dynamically Reconfigurable Coprocessor Architecture for Network Processors. / Albrecht, Carsten; Foag, Jürgen; Koch, Roman et al.
14th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP'06). IEEE, 2006. p. 101-108 1613259 ( Euromicro International Conference on Parallel, Distributed, and Network-Based Processing).

Research output: Chapters in Books/Reports/Conference Proceedings › Conference contribution › peer-review

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AU - Foag, Jürgen

AU - Koch, Roman

AU - Maehle, Erik

N1 - Conference code: 68364

PY - 2006/10/26

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N2 - Network processors are special purpose processors, tailored to the needs of packet processing in internet routers. Network processors are, in general, freely programmable devices. However, their performance in payloadprocessing relies on specific tasks to be accelerated by fixed purpose coprocessors which are integrated into the device. As a solution to overcome the restrictions of flexibility, a dynamically adaptable coprocessor based on dynamically and partially reconfigurable logic (DynaCORE) is proposed.

AB - Network processors are special purpose processors, tailored to the needs of packet processing in internet routers. Network processors are, in general, freely programmable devices. However, their performance in payloadprocessing relies on specific tasks to be accelerated by fixed purpose coprocessors which are integrated into the device. As a solution to overcome the restrictions of flexibility, a dynamically adaptable coprocessor based on dynamically and partially reconfigurable logic (DynaCORE) is proposed.

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DO - 10.1109/PDP.2006.30

M3 - Conference contribution

SN - 0-7695-2513-X

T3 - Euromicro International Conference on Parallel, Distributed, and Network-Based Processing

SP - 101

EP - 108

BT - 14th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP'06)

PB - IEEE

T2 - 14th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing

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Albrecht C, Foag J, Koch R, Maehle E. DynaCORE - A Dynamically Reconfigurable Coprocessor Architecture for Network Processors. In 14th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP'06). IEEE. 2006. p. 101-108. 1613259. ( Euromicro International Conference on Parallel, Distributed, and Network-Based Processing). doi: 10.1109/PDP.2006.30

DynaCORE - A Dynamically Reconfigurable Coprocessor Architecture for Network Processors

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