Adaptive communication architectures for runtime reconfigurable system-on-chips

Thilo Pionteck*, Carsten Albrecht, Roman Koch, Erik Maehle

*Corresponding author for this work
7 Citations (Scopus)


For exploiting the inherent parallelism enclosed in System-on-Chip designs, special architectural prerequisites have to be met. These prerequisites mainly affect the communication infrastructure, as parallel processing of all hardware modules accounts for a continuous and sufficient provision of data. While traditional communication architectures may fulfill these requirements for a fixed System-on-Chip design, changing composition, number and locations of processing modules in runtime reconfigurable System-on-Chips require new communication paradigms. Special communication architectures especially for use in runtime reconfigurable System-on-Chip designs are presented in this article. Their analysis provides a basis for the design of CoNoChi, a runtime reconfigurable Network-on-Chip dedicated for the usage in FPGA-based designs. CoNoChi supports the adaptation of the network topology during runtime by providing mechanisms to add or remove switches from the network during runtime without stopping or stalling the network. The applicability of CoNoChi is shown on the basis of a complex runtime reconfigurable System-on-Chip for networking applications. Prototyping results demonstrate that CoNoChi is a promising alternative to existing communication architectures supporting both a high degree of adaptability during runtime and a high concurrency of data transfers.

Original languageEnglish
JournalParallel Processing Letters
Issue number2
Pages (from-to)275-289
Number of pages15
Publication statusPublished - 01.06.2008


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