A Simulation-Based Methodology for Evaluating the DPA-Resistance of Cryptographic Functional Units with Application to CMOS and MCML Technologies

Francesco Regazzoni; Stephane Badel; Thomas Eisenbarth; Johann Grossschadl; Axel Poschmann; Zeynep Toprak Deniz; Marco Macchetti; Laura Pozzi; Christof Paar; Yusuf Leblebici; Paolo Ienne

doi:10.1109/ICSAMOS.2007.4285753

A Simulation-Based Methodology for Evaluating the DPA-Resistance of Cryptographic Functional Units with Application to CMOS and MCML Technologies

Francesco Regazzoni, Stephane Badel, Thomas Eisenbarth, Johann Grossschadl, Axel Poschmann, Zeynep Toprak Deniz, Marco Macchetti, Laura Pozzi, Christof Paar, Yusuf Leblebici, Paolo Ienne

Institute of IT-Security

Abstract

This paper explores the resistance of MOS current mode logic (MCML) against differential power analysis (DPA) attacks. Circuits implemented in MCML, in fact, have unique characteristics both in terms of power consumption and the dependency of the power profile from the input signal pattern. Therefore, MCML is suitable to protect cryptographic hardware from DPA and similar side-channel attacks. In order to demonstrate the effectiveness of different logic styles against power analysis attacks, the non-linear bijective function of the Kasumi algorithm (known as substitution box S7) was implemented with CMOS and MCML technology, and a set of attacks was performed using power traces derived from SPICE-level simulations. Although all keys were discovered for CMOS, only very few attacks to MCML were successful.

Original language	English
Title of host publication	2007 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation
Number of pages	6
Publisher	IEEE
Publication date	08.08.2007
Pages	209-214
ISBN (Print)	1-4244-1058-4
DOIs	https://doi.org/10.1109/ICSAMOS.2007.4285753
Publication status	Published - 08.08.2007
Event	2007 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation - Samos, Greece Duration: 16.07.2007 → 19.07.2007

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Regazzoni, F., Badel, S., Eisenbarth, T., Grossschadl, J., Poschmann, A., Deniz, Z. T., Macchetti, M., Pozzi, L., Paar, C., Leblebici, Y., & Ienne, P. (2007). A Simulation-Based Methodology for Evaluating the DPA-Resistance of Cryptographic Functional Units with Application to CMOS and MCML Technologies. In 2007 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (pp. 209-214). (International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation). IEEE. https://doi.org/10.1109/ICSAMOS.2007.4285753

Regazzoni, Francesco ; Badel, Stephane ; Eisenbarth, Thomas et al. / A Simulation-Based Methodology for Evaluating the DPA-Resistance of Cryptographic Functional Units with Application to CMOS and MCML Technologies. 2007 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation. IEEE, 2007. pp. 209-214 (International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation).

@inproceedings{251905ae623d4a8889f1a05b865b9846,

title = "A Simulation-Based Methodology for Evaluating the DPA-Resistance of Cryptographic Functional Units with Application to CMOS and MCML Technologies",

abstract = "This paper explores the resistance of MOS current mode logic (MCML) against differential power analysis (DPA) attacks. Circuits implemented in MCML, in fact, have unique characteristics both in terms of power consumption and the dependency of the power profile from the input signal pattern. Therefore, MCML is suitable to protect cryptographic hardware from DPA and similar side-channel attacks. In order to demonstrate the effectiveness of different logic styles against power analysis attacks, the non-linear bijective function of the Kasumi algorithm (known as substitution box S7) was implemented with CMOS and MCML technology, and a set of attacks was performed using power traces derived from SPICE-level simulations. Although all keys were discovered for CMOS, only very few attacks to MCML were successful.",

author = "Francesco Regazzoni and Stephane Badel and Thomas Eisenbarth and Johann Grossschadl and Axel Poschmann and Deniz, {Zeynep Toprak} and Marco Macchetti and Laura Pozzi and Christof Paar and Yusuf Leblebici and Paolo Ienne",

year = "2007",

month = aug,

day = "8",

doi = "10.1109/ICSAMOS.2007.4285753",

language = "English",

isbn = "1-4244-1058-4",

series = "International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation",

publisher = "IEEE",

pages = "209--214",

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note = "2007 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation ; Conference date: 16-07-2007 Through 19-07-2007",

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Regazzoni, F, Badel, S, Eisenbarth, T, Grossschadl, J, Poschmann, A, Deniz, ZT, Macchetti, M, Pozzi, L, Paar, C, Leblebici, Y & Ienne, P 2007, A Simulation-Based Methodology for Evaluating the DPA-Resistance of Cryptographic Functional Units with Application to CMOS and MCML Technologies. in 2007 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation. International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, IEEE, pp. 209-214, 2007 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, Samos, Greece, 16.07.07. https://doi.org/10.1109/ICSAMOS.2007.4285753

A Simulation-Based Methodology for Evaluating the DPA-Resistance of Cryptographic Functional Units with Application to CMOS and MCML Technologies. / Regazzoni, Francesco; Badel, Stephane; Eisenbarth, Thomas et al.
2007 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation. IEEE, 2007. p. 209-214 (International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation).

Research output: Chapters in Books/Reports/Conference Proceedings › Conference contribution › peer-review

TY - GEN

T1 - A Simulation-Based Methodology for Evaluating the DPA-Resistance of Cryptographic Functional Units with Application to CMOS and MCML Technologies

AU - Regazzoni, Francesco

AU - Badel, Stephane

AU - Eisenbarth, Thomas

AU - Grossschadl, Johann

AU - Poschmann, Axel

AU - Deniz, Zeynep Toprak

AU - Macchetti, Marco

AU - Pozzi, Laura

AU - Paar, Christof

AU - Leblebici, Yusuf

AU - Ienne, Paolo

PY - 2007/8/8

Y1 - 2007/8/8

N2 - This paper explores the resistance of MOS current mode logic (MCML) against differential power analysis (DPA) attacks. Circuits implemented in MCML, in fact, have unique characteristics both in terms of power consumption and the dependency of the power profile from the input signal pattern. Therefore, MCML is suitable to protect cryptographic hardware from DPA and similar side-channel attacks. In order to demonstrate the effectiveness of different logic styles against power analysis attacks, the non-linear bijective function of the Kasumi algorithm (known as substitution box S7) was implemented with CMOS and MCML technology, and a set of attacks was performed using power traces derived from SPICE-level simulations. Although all keys were discovered for CMOS, only very few attacks to MCML were successful.

AB - This paper explores the resistance of MOS current mode logic (MCML) against differential power analysis (DPA) attacks. Circuits implemented in MCML, in fact, have unique characteristics both in terms of power consumption and the dependency of the power profile from the input signal pattern. Therefore, MCML is suitable to protect cryptographic hardware from DPA and similar side-channel attacks. In order to demonstrate the effectiveness of different logic styles against power analysis attacks, the non-linear bijective function of the Kasumi algorithm (known as substitution box S7) was implemented with CMOS and MCML technology, and a set of attacks was performed using power traces derived from SPICE-level simulations. Although all keys were discovered for CMOS, only very few attacks to MCML were successful.

U2 - 10.1109/ICSAMOS.2007.4285753

DO - 10.1109/ICSAMOS.2007.4285753

M3 - Conference contribution

SN - 1-4244-1058-4

T3 - International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation

SP - 209

EP - 214

BT - 2007 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation

PB - IEEE

T2 - 2007 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation

Y2 - 16 July 2007 through 19 July 2007

ER -

Regazzoni F, Badel S, Eisenbarth T, Grossschadl J, Poschmann A, Deniz ZT et al. A Simulation-Based Methodology for Evaluating the DPA-Resistance of Cryptographic Functional Units with Application to CMOS and MCML Technologies. In 2007 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation. IEEE. 2007. p. 209-214. (International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation). doi: 10.1109/ICSAMOS.2007.4285753

A Simulation-Based Methodology for Evaluating the DPA-Resistance of Cryptographic Functional Units with Application to CMOS and MCML Technologies

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