A Code-Based Analytical Approach for Using Separate Device Coprocessors in Computing Systems

Volker Hampel; Grigori Goronzy; Erik Maehle

doi:10.1007/978-3-642-19137-4_1

A Code-Based Analytical Approach for Using Separate Device Coprocessors in Computing Systems

Volker Hampel, Grigori Goronzy, Erik Maehle

Institute of Computer Engineering

Institute of Computer Engineering

1 Citation (Scopus)

Abstract

Special hardware accelerators like FPGAs and GPUs are commonly introduced into a computing system as a separate device. Consequently, the accelerator and the host system do not share a common memory. Sourcing out the data to the additional hardware thus introduces a communication penalty. Based on a combination of a program's source code and execution profiling we perform an analysis which evaluates the arithmetic intensity as a cost function to identify those parts most reasonable to source out to the accelerating hardware. The basic principles of this analysis are introduced and tested with a sample application. Its concrete results are discussed and evaluated based on the performance of a FPGA-based and a GPU-based implementation.

Original language	English
Title of host publication	ARCS 2011: Architecture of Computing Systems - ARCS 2011
Number of pages	12
Volume	6566
Publisher	Springer Verlag
Publication date	02.03.2011
Pages	1-12
ISBN (Print)	978-3-642-19136-7
ISBN (Electronic)	978-3-642-19137-4
DOIs	https://doi.org/10.1007/978-3-642-19137-4_1
Publication status	Published - 02.03.2011
Event	24th International Conference on Architecture of Computing Systems - Como, Italy Duration: 24.02.2011 → 25.02.2011 Conference number: 83943

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10.1007/978-3-642-19137-4_1

Cite this

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title = "A Code-Based Analytical Approach for Using Separate Device Coprocessors in Computing Systems",

abstract = "Special hardware accelerators like FPGAs and GPUs are commonly introduced into a computing system as a separate device. Consequently, the accelerator and the host system do not share a common memory. Sourcing out the data to the additional hardware thus introduces a communication penalty. Based on a combination of a program's source code and execution profiling we perform an analysis which evaluates the arithmetic intensity as a cost function to identify those parts most reasonable to source out to the accelerating hardware. The basic principles of this analysis are introduced and tested with a sample application. Its concrete results are discussed and evaluated based on the performance of a FPGA-based and a GPU-based implementation.",

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Hampel, V, Goronzy, G & Maehle, E 2011, A Code-Based Analytical Approach for Using Separate Device Coprocessors in Computing Systems. in ARCS 2011: Architecture of Computing Systems - ARCS 2011 . vol. 6566 , Lecture Notes in Computer Science, vol. 6566 LNCS, Springer Verlag, pp. 1-12, 24th International Conference on Architecture of Computing Systems
, Como, Italy, 24.02.11. https://doi.org/10.1007/978-3-642-19137-4_1

A Code-Based Analytical Approach for Using Separate Device Coprocessors in Computing Systems. / Hampel, Volker; Goronzy, Grigori; Maehle, Erik.
ARCS 2011: Architecture of Computing Systems - ARCS 2011 . Vol. 6566 Springer Verlag, 2011. p. 1-12 (Lecture Notes in Computer Science; Vol. 6566 LNCS).

Research output: Chapters in Books/Reports/Conference Proceedings › Conference contribution › peer-review

TY - GEN

T1 - A Code-Based Analytical Approach for Using Separate Device Coprocessors in Computing Systems

AU - Hampel, Volker

AU - Goronzy, Grigori

AU - Maehle, Erik

N1 - Conference code: 83943

PY - 2011/3/2

Y1 - 2011/3/2

N2 - Special hardware accelerators like FPGAs and GPUs are commonly introduced into a computing system as a separate device. Consequently, the accelerator and the host system do not share a common memory. Sourcing out the data to the additional hardware thus introduces a communication penalty. Based on a combination of a program's source code and execution profiling we perform an analysis which evaluates the arithmetic intensity as a cost function to identify those parts most reasonable to source out to the accelerating hardware. The basic principles of this analysis are introduced and tested with a sample application. Its concrete results are discussed and evaluated based on the performance of a FPGA-based and a GPU-based implementation.

AB - Special hardware accelerators like FPGAs and GPUs are commonly introduced into a computing system as a separate device. Consequently, the accelerator and the host system do not share a common memory. Sourcing out the data to the additional hardware thus introduces a communication penalty. Based on a combination of a program's source code and execution profiling we perform an analysis which evaluates the arithmetic intensity as a cost function to identify those parts most reasonable to source out to the accelerating hardware. The basic principles of this analysis are introduced and tested with a sample application. Its concrete results are discussed and evaluated based on the performance of a FPGA-based and a GPU-based implementation.

UR - https://www.scopus.com/pages/publications/79952031210

U2 - 10.1007/978-3-642-19137-4_1

DO - 10.1007/978-3-642-19137-4_1

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T3 - Lecture Notes in Computer Science

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BT - ARCS 2011: Architecture of Computing Systems - ARCS 2011

PB - Springer Verlag

T2 - 24th International Conference on Architecture of Computing Systems <br/>

Y2 - 24 February 2011 through 25 February 2011

ER -

A Code-Based Analytical Approach for Using Separate Device Coprocessors in Computing Systems

Abstract

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