Research Output per year
Research Output per year
Research Output
- 4 Conference contribution
Search results
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2016
Adaptive allocation of default router paths in Network-on-Chips for latency reduction
Joseph, J. M., Blochwitz, C. & Pionteck, T., 01.07.2016, 2016 International Conference on High Performance Computing Simulation (HPCS). IEEE, p. 140-147 8 p. 7568328. (IEEE Proceedings).Research output: Chapters in Books/Reports/Conference Proceedings › Conference contribution › peer-review
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A simulation environment for design space exploration for asymmetric 3D-Network-on-Chip
Joseph, J. M., Wrieden, S., Blochwitz, C., García-Oritz, A. & Pionteck, T., 01.06.2016, 2016 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC). IEEE, p. 1-8 8 p. 7533908. (IEEE Proceedings).Research output: Chapters in Books/Reports/Conference Proceedings › Conference contribution › peer-review
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2015
Area and power savings via buffer reorganization in asymmetric 3D-NoCs for heterogeneous 3D-SoCs
Joseph, J. M., Blochwitz, C., Pionteck, T. & García-Ortiz, A., 01.10.2015, 2015 Nordic Circuits and Systems Conference (NORCAS): NORCHIP International Symposium on System-on-Chip (SoC). Oslo, Norway: IEEE, p. 1-4 4 p. (IEEE Proceedings).Research output: Chapters in Books/Reports/Conference Proceedings › Conference contribution › peer-review
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2014
A cycle-accurate Network-on-Chip simulator with support for abstract task graph modeling
Joseph, J. M. & Pionteck, T., 01.10.2014, 2014 International Symposium on System-on-Chip (SoC). IEEE, p. 1-6 6 p. 6972440. (IEEE Proceedings).Research output: Chapters in Books/Reports/Conference Proceedings › Conference contribution › peer-review