Research Output per year
Supervised work per year
Supervised Work
- 28 results
Search results
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2018
Konstruktion von Lösungen für Unart-Subset-Sun und verwandte Probleme in TC^0
Bartels, F., 2018Research output: Published Theses › Master Theses
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Scheduling-Algorithmen für Energiemanagementsysteme in Smart-Homes
Bachmann, M., 2018Research output: Published Theses › Master Theses
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2017
Dreiwertige Timed-LTL-Semantik.
Huber, D., 2017, Lübeck.Research output: Published Theses › Master Theses
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Möglichkeiten und Grenzen der parallelen Berechnung von Kerneln
Lassota, A. A., 2017Research output: Published Theses › Master Theses
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SMT-based Flat Model-Checking for LTL with Counting
Pirogov, A., 15.09.2017, 85 p.Research output: Published Theses › Master Theses
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2016
Algorithmisches Zeichnen von Automaten.
Henke, G., 2016Research output: Published Theses › Bachelor Theses
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Effizienter Leerheitstest pro Zustand auf Buch-Automaten
Kallwies, H., 2016Research output: Published Theses › Bachelor Theses
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Vierwertige Timed-Linear-Temporal-Logic
Bierschenk, M., 2016Research output: Published Theses › Bachelor Theses
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2015
An Algorithmic Toolbox to Facilitate the Genetic Finite Automata Based Approach for Negative Selection
Pott, C., 2015Research output: Published Theses › Bachelor Theses
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Extending Freeze LTL on Multi-Attributed Data Words with Quantifiers
Pirogov, A., 2015Research output: Published Theses › Bachelor Theses
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From 2-Ways Nondeterministic Büchi Automata to Alternating Büchi Automata
Kabelitz, M., 2015Research output: Published Theses › Bachelor Theses
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Graph-basierte Wasserzeichen für Software
Buss, K.-D., 2015Research output: Published Theses › Bachelor Theses
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Minimierung symbolischer nichtdeterministischer Büchi-Automaten
Thorn, J., 2015Research output: Published Theses › Master Theses
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Runetime Verification Logics for Object-Oriented Real-Time Systems
Mende, T., 2015Research output: Published Theses › Master Theses
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2014
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Entwurf und Implementierung eines Algorithmus zur Berechnung einer Pfadzerlegung von kubischen Graphen.
Lassota, K., 2014Research output: Published Theses › Master Theses
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Logiken für verteilte Laufzeitverfikation.
Scheffel, T., 2014Research output: Published Theses › Master Theses
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STL: Combining Stream-based and Temporal Logics.
Tils, E. V., 2014Research output: Published Theses › Master Theses
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Verteilte Laufzeitverfikation auf eingebetteten Systemen.
Schmitz, M., 2014Research output: Published Theses › Master Theses
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Vier-wertige Abwicklungssemantik für Timet-LTL.
Meschkat, M., 2014Research output: Published Theses › Bachelor Theses
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2013
Mehrdimensionale Histogram Equalization: Modellierung und komplexitätstheoretische Analyse
Idelberger, A., 2013Research output: Published Theses › Bachelor Theses
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Runtime Verification for Mazurkiewicz Traces.
Waziri, C., 2013Research output: Published Theses › Master Theses
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2012
Algorithmen und Datenstrukturen für Prioritätswarteschlangen auf partiellen Ordnungen
Krüger, C., 2012Research output: Published Theses › Bachelor Theses
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DSL-based Runtime Verification for the JVM.
Pohlmann, C., 2012Research output: Published Theses › Master Theses
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Multimengen-Baumautomaten: Analyse und Implementierung
Bürger, M., 2012Research output: Published Theses › Bachelor Theses
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Transformation von regulärer Linearzeit-Temporallogik zu Paritätsautomaten.
Schmitz, M., 2012Research output: Published Theses › Bachelor Theses
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Turn Costs in Energy-Optimal Route Planning for Electric Vehicles
Harms, P., 2012Research output: Published Theses › Bachelor Theses
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2011
Transformationen von Paritätsautomaten in Büchi-Automaten
Scheffel, T., 2011Research output: Published Theses › Bachelor Theses