Christopher Blochwitz

Research output

Research output per year 2015 2015 2016 2017 2018 2021

• 15 Conference contribution
• 5 Journal articles
• 2 Conference Papers

Research output per year

Research output per year

Search results

• 2021

  A comparative survey of open-source application-class RISC-V processor implementations: Proceedings of the 18th ACM International Conference on Computing Frontiers

  Dörflinger, A., Albers, M., Kleinbeck, B., Guan, Y., Michalik, H., Klink, R., Blochwitz, C., Nechi, A. & Berekovic, M., 11.05.2021, CF '21: Proceedings of the 18th ACM International Conference on Computing Frontiers 2021. Palesi, M. & Tumeo, A. (eds.). New York, NY, USA: Association for Computing Machinery, (Computing Frontiers Conference).

  Research output: Chapters in Books/Reports/Conference Proceedings › Conference contribution › peer-review

  • Reduced instruction set computing 100%
  • Electric power utilization 39%
  • Rockets 28%
  • Application specific integrated circuits 28%
  • Specifications 17%

• StreamGrid - An AXI-Stream-Compliant Overlay Architecture

  Blochwitz, C., Philipp, L., Berekovic, M. & Pionteck, T., 2021, Applied Reconfigurable Computing. Architectures, Tools, and Applications. Derrien, S., Hannig, F., Diniz, P. C. & Chillet, D. (eds.). Springer, p. 156-170 15 p. (Lecture Notes in Computer Science).

  Research output: Chapters in Books/Reports/Conference Proceedings › Conference contribution › peer-review
• 2020

  Hardware-aided update acceleration in a hybrid Semantic Web database system

  Heinrich, D., Werner, S., Blochwitz, C., Pionteck, T. & Groppe, S., 01.10.2020, In: Journal of Supercomputing. 76, 10, p. 7961-7984 24 p.

  Research output: Journal Articles › Journal articles › Research › peer-review

  • Semantic Web 100%
  • Field programmable gate arrays (FPGA) 80%
  • Computer hardware 57%
• 2018

  Hardware-Accelerated Index Construction for Semantic Web

  Blochwitz, C., Wolff, J., Berekovic, M., Heinrich, D., Groppe, S., Joseph, J. M. & Pionteck, T., 12.2018, 2018 International Conference on Field-Programmable Technology (FPT). IEEE, p. 281-284 4 p. 8742268

  Research output: Chapters in Books/Reports/Conference Proceedings › Conference contribution › peer-review

  • Semantic Web 100%
  • Computer hardware 57%
  • Data structures 53%
  • Parallel architectures 37%
  • Semantics 22%

• Hardware-Triplestore – a Hardware-centric Database for Semantic Web

  Blochwitz, C., Wolff, J., Berekovic, M., Heinrich, D., Groppe, S., Joseph, J. M. & Pionteck, T., 2018.

  Research output: Contribution to conference › Conference Papers › peer-review

• Search Update Optimization of a B^+Tree in a Hardware Aided Semantic Web Database System

  Heinrich, D., Werner, S., Blochwitz, C., Pionteck, T. & Groppe, S., 14.10.2018, Proceedings of the 7th International Conference on Emerging Databases. Lee, W., Choi, W., Jung, S. & Song, M. (eds.). Singapore: Springer Singapore, p. 172-182 11 p. (Lecture Notes in Electrical Engineering; vol. 461).

  Research output: Chapters in Books/Reports/Conference Proceedings › Conference contribution › peer-review

  • Semantic Web 100%
  • Field programmable gate arrays (FPGA) 80%
  • Computer hardware 57%
  • Program processors 20%
  • Data storage equipment 14%
• 2017

  Area and power savings via asymmetric organization of buffers in 3D-NoCs for heterogeneous 3D-SoCs

  Joseph, J. M., Blochwitz, C., García-Ortiz, A. & Pionteck, T., 01.02.2017, In: Microprocessors and Microsystems. 48, p. 36-47 12 p.

  Research output: Journal Articles › Journal articles › Research › peer-review

  • Network-on-chip 100%
  • System-on-chip 90%
  • Routers 85%
  • Costs 33%
  6 Citations (Scopus)

• Contentious Live-Tracing as Debugging Approach on FPGAs

  Blochwitz, C., Klink, R., Joseph, J. M. & Pionteck, T., 2017.

  Research output: Contribution to conference › Conference Papers › peer-review

• Continuous live-tracing as debugging approach on FPGAs

  Blochwitz, C., Klink, R., Joseph, J. M. & Pionteck, T., 01.12.2017, 2017 International Conference on ReConFigurable Computing and FPGAs (ReConFig). IEEE, p. 1-8 8 p. (IEEE Proceedings).

  Research output: Chapters in Books/Reports/Conference Proceedings › Conference contribution › peer-review

  • Clocks 100%
  • Field programmable gate arrays (FPGA) 95%
  • Bandwidth 36%
  • Monitoring 33%

• Design space exploration for a hardware-accelerated embedded real-time pose estimation using vivado HLS

  Joseph, J. M., Mey, M., Ehlers, K., Blochwitz, C., Winker, T. & Pionteck, T., 02.02.2017, 2017 International Conference on ReConFigurable Computing and FPGAs (ReConFig). IEEE, p. 1-8 8 p.

  Research output: Chapters in Books/Reports/Conference Proceedings › Conference contribution › peer-review

  • Embedded systems 100%
  • Computer hardware 94%
  • Field programmable gate arrays (FPGA) 88%
  • Particle accelerators 54%
  • Computer systems 47%

• Hardware-Accelerated Radix-Tree Based String Sorting for Big Data Applications

  Blochwitz, C., Wolff, J., Joseph, J. M., Werner, S., Heinrich, D., Groppe, S. & Pionteck, T., 04.03.2017, Architecture of Computing Systems - ARCS 2017. Knoop, J., Karl, W., Schulz, M., Inoue, K. & Pionteck, T. (eds.). Cham: Springer International Publishing, Vol. 10172. p. 47-58 12 p. (Lecture Notes in Computer Science; vol. 10172).

  Research output: Chapters in Books/Reports/Conference Proceedings › Conference contribution › peer-review

  • Sorting 100%
  • Big data 92%
  • Computer hardware 59%
  • Memory architecture 42%
  • Semantic Web 34%
• 2016

  Adaptive allocation of default router paths in Network-on-Chips for latency reduction

  Joseph, J. M., Blochwitz, C. & Pionteck, T., 01.07.2016, 2016 International Conference on High Performance Computing Simulation (HPCS). IEEE, p. 140-147 8 p. 7568328. (IEEE Proceedings).

  Research output: Chapters in Books/Reports/Conference Proceedings › Conference contribution › peer-review

  • Network-on-chip 100%
  • Routers 85%
  • Data streams 44%
  • Pipelines 33%

• A simulation environment for design space exploration for asymmetric 3D-Network-on-Chip

  Joseph, J. M., Wrieden, S., Blochwitz, C., García-Oritz, A. & Pionteck, T., 01.06.2016, 2016 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC). IEEE, p. 1-8 8 p. 7533908. (IEEE Proceedings).

  Research output: Chapters in Books/Reports/Conference Proceedings › Conference contribution › peer-review

  • Network-on-chip 100%
  • System-on-chip 18%
  • Routers 17%
  • Systems analysis 13%
  • Simulators 12%

• Constructing Large-Scale Semantic Web Indices for the Six RDF Collation Orders

  Groppe, S., Heinrich, D., Blochwitz, C. & Pionteck, T., 2016, In: Open Journal of Big Data (OJBD). 2, 1, p. 11-25 15 p.

  Research output: Journal Articles › Journal articles › Research › peer-review

  • Semantic Web 100%
  • Query processing 27%
  • Data structures 20%

• Hardware-accelerated pose estimation for embedded systems using Vivado HLS

  Joseph, J. M., Winker, T., Ehlers, K., Blochwitz, C. & Pionteck, T., 01.11.2016, 2016 International Conference on ReConFigurable Computing and FPGAs (ReConFig). IEEE, p. 1-7 7 p. 126407. (IEEE Proceedings).

  Research output: Chapters in Books/Reports/Conference Proceedings › Conference contribution › peer-review

  • High level synthesis 100%
  • Embedded systems 72%
  • ARM processors 56%
  • Gesture recognition 46%
  • Computer hardware 45%

• Runtime Adaptive Hybrid Query Engine based on FPGAs

  Werner, S., Heinrich, D., Groppe, S., Blochwitz, C. & Pionteck, T., 2016, In: Open Journal of Databases (OJDB). 3, 1, p. 21-41 21 p.

  Research output: Journal Articles › Journal articles › Research › peer-review

  • Field programmable gate arrays (FPGA) 100%
  • Engines 78%
  • Semantic Web 62%
  • Particle accelerators 62%
  • Computer hardware 53%
• 2015

  An architectural template for composing application specific datapaths at runtime

  Backasch, R., Hempel, G., Blochwitz, C., Werner, S., Groppe, S. & Pionteck, T., 01.12.2015, 2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig). IEEE, p. 1-6 6 p. 7393300. (IEEE Proceedings).

  Research output: Chapters in Books/Reports/Conference Proceedings › Conference contribution › peer-review

  • Tile 100%
  • Data streams 45%
  • Chemical analysis 29%
  • Computer hardware 26%

• An optimized radix-tree for hardware-accelerated dictionary generation for semantic web databases

  Blochwitz, C., Joseph, J. M., Pionteck, T., Werner, S., Heinrich, D., Groppe, S. & Backasch, R., 01.12.2015, 2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig). IEEE, p. 1-7 7 p. 7393291. (IEEE Proceedings ).

  Research output: Chapters in Books/Reports/Conference Proceedings › Conference contribution › peer-review

  • Semantic Web 100%
  • Glossaries 94%
  • Field programmable gate arrays (FPGA) 60%
  • Computer hardware 57%
  • Data structures 40%

• Area and power savings via buffer reorganization in asymmetric 3D-NoCs for heterogeneous 3D-SoCs

  Joseph, J. M., Blochwitz, C., Pionteck, T. & García-Ortiz, A., 01.10.2015, 2015 Nordic Circuits and Systems Conference (NORCAS): NORCHIP International Symposium on System-on-Chip (SoC). Oslo, Norway: IEEE, p. 1-4 4 p. (IEEE Proceedings).

  Research output: Chapters in Books/Reports/Conference Proceedings › Conference contribution › peer-review

  • Network-on-chip 100%
  • System-on-chip 90%
  • Routers 85%

• Automated composition and execution of hardware-accelerated operator graphs

  Werner, S., Heinrich, D., Groppe, S., Blochwitz, C., Pionteck, T., Piper, J. & Backasch, R., 01.06.2015, 2015 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC). IEEE, p. 1-8 8 p. 7238078. (IEEE Proceedings).

  Research output: Chapters in Books/Reports/Conference Proceedings › Conference contribution › peer-review

  • Field programmable gate arrays (FPGA) 100%
  • Chemical analysis 79%
  • Computer hardware 71%
  • Particle accelerators 49%
  • Semantic Web 24%

• Hybrid FPGA approach for a B+ tree in a Semantic Web database system

  Heinrich, D., Werner, S., Stelzner, M., Blochwitz, C., Pionteck, T. & Groppe, S., 01.06.2015, 2015 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC). IEEE, p. 1-8 8 p. (International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)).

  Research output: Chapters in Books/Reports/Conference Proceedings › Conference contribution › peer-review

  • Semantic Web 100%
  • Field programmable gate arrays (FPGA) 80%
  • Hybrid systems 24%
  • Program processors 20%

• PatTrieSort - External String Sorting based on Patricia Tries

  Groppe, S., Heinrich, D., Werner, S., Blochwitz, C. & Pionteck, T., 01.10.2015, In: Open Journal of Databases (OJDB). 2, 1, p. 36-50 15 p.

  Research output: Journal Articles › Journal articles › Research › peer-review

  • Merging 100%
  • Sorting 99%
  • Data storage equipment 62%
  • Big data 45%