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Transformational design of a fault tolerant sequential memory component

Walter Dosch

Abstract

A sequential memory component stores and retrieves data in addressable locations. A fault tolerant implementation suspends read commands to locations without a prior assignment until data becomes available at the requested location. The paper studies the systematic top-down design of a fault tolerant sequential memory component in the setting of stream functions and state transition machines. We formally refine the communication-oriented input/output behaviour into a state-based implementation. The transformation employs a history abstraction function which extracts the component's internal state from the input history. Beyond the particular case study, we explicate generally applicable formal methods for the functional specification and systematic design of interactive components in distributed systems with asynchronous communication.

OriginalspracheEnglisch
Titel23rd International Conference on Computers and Their Applications, CATA 2008
Seitenumfang8
Herausgeber (Verlag)International Speech and Communication Association (ISCA)
Erscheinungsdatum01.12.2008
Seiten181-188
ISBN (Print)978-160423235-6
PublikationsstatusVeröffentlicht - 01.12.2008
Veranstaltung23rd International Conference on Computers and Their Applications
- Cancun, Mexico
Dauer: 09.04.200811.04.2008
Konferenznummer: 98931

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  1. SDG 9 – Industrie, Innovation und Infrastruktur
    SDG 9 – Industrie, Innovation und Infrastruktur

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