Abstract
Current network processors (NPs) are VLSI-devices dedicated to high-speed packet forwarding. While their architectures are optimized for high throughput rates, they normally disregard protocol-processing delays which result from data dependencies inherent to encapsulated protocol-layers. The key to overcome this limitation is to speculalively dissolve these dependencies and to allow an accelerated control-path processing. This paper comprises the entire framework of a speculative NP conception, implementation and evaluation. Besides an generic evaluation, the benefit of the system is shown by system simulation. Utilizing the approach, a latency reduction of up to 14.9 percent can be achieved compared to traditional implementations.
Originalsprache | Englisch |
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Titel | Third IEEE International Symposium on Network Computing and Applications, 2004. (NCA 2004). Proceedings. |
Seitenumfang | 8 |
Herausgeber (Verlag) | IEEE |
Erscheinungsdatum | 01.12.2004 |
Seiten | 207-214 |
ISBN (Print) | 0-7695-2242-4 |
DOIs | |
Publikationsstatus | Veröffentlicht - 01.12.2004 |
Veranstaltung | 3th IEEE International Symposium on Network Computing and Applications - Cambridge, USA / Vereinigte Staaten Dauer: 30.08.2004 → 01.09.2004 Konferenznummer: 64724 |