Abstract
Virtual duplex systems provide detection of transient as well as most permanent hardware faults by executing two versions of a program on a single processor in a time-shared manner. Previous studies on virtual duplex systems have focussed on either improving fault coverage or reducing overhead. We build upon this work and investigate the positive influence of an underlying processor architecture that supports parallelism in the form of multiple threads in hardware. Such processor architectures are just entering the market, with a die area only slightly larger than that of a conventional processor. A. performance prediction shows that those processors allow faster fault detection than conventional processors of the same speed. Moreover, the parallelism can be utilized for a recovery that extends the concept of virtual duplex systems. Additionally, we present a technique that further increases the above mentioned gain by using prediction of the faulty version in a manner similar to branch prediction.
| Originalsprache | Englisch |
|---|---|
| Titel | 18th International Parallel and Distributed Processing Symposium, 2004. Proceedings |
| Seitenumfang | 8 |
| Band | 18 |
| Herausgeber (Verlag) | IEEE |
| Erscheinungsdatum | 01.01.2004 |
| Seiten | 2919-2926 |
| ISBN (Print) | 0-7695-2132-0 |
| DOIs | |
| Publikationsstatus | Veröffentlicht - 01.01.2004 |
| Veranstaltung | Proceedings - 18th International Parallel and Distributed Processing Symposium - Santa Fe, USA / Vereinigte Staaten Dauer: 26.04.2004 → 30.04.2004 Konferenznummer: 63369 |
UN SDGs
Dieser Output leistet einen Beitrag zu folgendem(n) Ziel(en) für nachhaltige Entwicklung
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SDG 9 – Industrie, Innovation und Infrastruktur
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