Hybrid FPGA approach for a B+ tree in a Semantic Web database system

D. Heinrich, S. Werner, M. Stelzner, C. Blochwitz, T. Pionteck, S. Groppe

Abstract

In this paper we present a hybrid index structure which is allocated in a Field Programmable Gate Array (FPGA) and a traditional CPU-based host system. The used index structure of this system is a B+-tree which is a common index used in disk based databases. The hybrid index is divided into two parts. The lower levels of the B+-tree, especially the leaves where the values are stored, are located on the host system while the root and the most upper levels with the interior nodes are stored on the FPGA. We speed up the search in the upper levels of our hybrid index by applying an FPGA accelerated parallel search. In the evaluation we show how the amount of keys inside the interior nodes on the FPGA and the order of the B+-tree take an impact on the whole hybrid system. The results show that the computation time of the software system can be halved.
OriginalspracheEnglisch
Titel2015 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)
Seitenumfang8
Herausgeber (Verlag)IEEE
Erscheinungsdatum01.06.2015
Seiten1-8
ISBN (Print)978-1-4673-7941-0
ISBN (elektronisch)978-1-4673-7942-7
DOIs
PublikationsstatusVeröffentlicht - 01.06.2015
Veranstaltung2015 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC) - Bremen, Deutschland
Dauer: 29.06.201501.07.2015

Strategische Forschungsbereiche und Zentren

  • Querschnittsbereich: Intelligente Systeme
  • Zentren: Zentrum für Künstliche Intelligenz Lübeck (ZKIL)

DFG-Fachsystematik

  • 409-04 Betriebs-, Kommunikations-, Datenbank- und verteilte Systeme

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