Hybrid FPGA approach for a B+ tree in a Semantic Web database system

D. Heinrich; S. Werner; M. Stelzner; C. Blochwitz; T. Pionteck; S. Groppe

doi:10.1109/ReCoSoC.2015.7238093

Hybrid FPGA approach for a B+ tree in a Semantic Web database system

D. Heinrich, S. Werner, M. Stelzner, C. Blochwitz, T. Pionteck, S. Groppe

Abstract

In this paper we present a hybrid index structure which is allocated in a Field Programmable Gate Array (FPGA) and a traditional CPU-based host system. The used index structure of this system is a B+-tree which is a common index used in disk based databases. The hybrid index is divided into two parts. The lower levels of the B+-tree, especially the leaves where the values are stored, are located on the host system while the root and the most upper levels with the interior nodes are stored on the FPGA. We speed up the search in the upper levels of our hybrid index by applying an FPGA accelerated parallel search. In the evaluation we show how the amount of keys inside the interior nodes on the FPGA and the order of the B+-tree take an impact on the whole hybrid system. The results show that the computation time of the software system can be halved.

Originalsprache	Englisch
Titel	2015 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)
Seitenumfang	8
Herausgeber (Verlag)	IEEE
Erscheinungsdatum	01.06.2015
Seiten	1-8
ISBN (Print)	978-1-4673-7941-0
ISBN (elektronisch)	978-1-4673-7942-7
DOIs	https://doi.org/10.1109/ReCoSoC.2015.7238093
Publikationsstatus	Veröffentlicht - 01.06.2015
Veranstaltung	2015 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC) - Bremen, Deutschland Dauer: 29.06.2015 → 01.07.2015

Strategische Forschungsbereiche und Zentren

Querschnittsbereich: Intelligente Systeme
Zentren: Zentrum für Künstliche Intelligenz Lübeck (ZKIL)

DFG-Fachsystematik

4.43-03 Sicherheit und Verlässlichkeit, Betriebs-, Kommunikations- und verteilte Systeme

UN SDGs

Dieser Output leistet einen Beitrag zu folgendem(n) Ziel(en) für nachhaltige Entwicklung

Dokumente

10.1109/ReCoSoC.2015.7238093

Weitere Links

https://www.researchgate.net/publication/308805617_Hybrid_FPGA_approach_for_a_B_tree_in_a_Semantic_Web_database_system

Hardwarebeschleunigung von Semantic Web Datenbanken durch dynamisch rekonfigurierbare FPGAs
Groppe, S. (Sprecher*in, Koordinator*in) & Pionteck, T. (Sprecher*in, Koordinator*in)
01.08.13 → 31.07.19
Projekt: DFG-Projekte › DFG Einzelförderungen

Zitieren

Heinrich, D., Werner, S., Stelzner, M., Blochwitz, C., Pionteck, T., & Groppe, S. (2015). Hybrid FPGA approach for a B+ tree in a Semantic Web database system. in 2015 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC) (S. 1-8). (International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)). IEEE. https://doi.org/10.1109/ReCoSoC.2015.7238093

@inproceedings{6228cdf801c6423ca4308044aa463641,

title = "Hybrid FPGA approach for a B+ tree in a Semantic Web database system",

abstract = "In this paper we present a hybrid index structure which is allocated in a Field Programmable Gate Array (FPGA) and a traditional CPU-based host system. The used index structure of this system is a B+-tree which is a common index used in disk based databases. The hybrid index is divided into two parts. The lower levels of the B+-tree, especially the leaves where the values are stored, are located on the host system while the root and the most upper levels with the interior nodes are stored on the FPGA. We speed up the search in the upper levels of our hybrid index by applying an FPGA accelerated parallel search. In the evaluation we show how the amount of keys inside the interior nodes on the FPGA and the order of the B+-tree take an impact on the whole hybrid system. The results show that the computation time of the software system can be halved.",

author = "D. Heinrich and S. Werner and M. Stelzner and C. Blochwitz and T. Pionteck and S. Groppe",

year = "2015",

month = jun,

day = "1",

doi = "10.1109/ReCoSoC.2015.7238093",

language = "English",

isbn = "978-1-4673-7941-0",

series = "International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)",

publisher = "IEEE",

pages = "1--8",

booktitle = "2015 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)",

note = "2015 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC) ; Conference date: 29-06-2015 Through 01-07-2015",

}

Heinrich, D, Werner, S, Stelzner, M , Blochwitz, C, Pionteck, T & Groppe, S 2015, Hybrid FPGA approach for a B+ tree in a Semantic Web database system. in 2015 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC). International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), IEEE, S. 1-8, 2015 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), Bremen, Deutschland, 29.06.15. https://doi.org/10.1109/ReCoSoC.2015.7238093

Hybrid FPGA approach for a B+ tree in a Semantic Web database system. / Heinrich, D.; Werner, S.; Stelzner, M. et al.
2015 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC). IEEE, 2015. S. 1-8 (International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)).

Publikation: Kapitel in Büchern/Berichten/Konferenzbänden › Konferenzbeitrag › Begutachtung

TY - GEN

T1 - Hybrid FPGA approach for a B+ tree in a Semantic Web database system

AU - Heinrich, D.

AU - Werner, S.

AU - Stelzner, M.

AU - Blochwitz, C.

AU - Pionteck, T.

AU - Groppe, S.

PY - 2015/6/1

Y1 - 2015/6/1

N2 - In this paper we present a hybrid index structure which is allocated in a Field Programmable Gate Array (FPGA) and a traditional CPU-based host system. The used index structure of this system is a B+-tree which is a common index used in disk based databases. The hybrid index is divided into two parts. The lower levels of the B+-tree, especially the leaves where the values are stored, are located on the host system while the root and the most upper levels with the interior nodes are stored on the FPGA. We speed up the search in the upper levels of our hybrid index by applying an FPGA accelerated parallel search. In the evaluation we show how the amount of keys inside the interior nodes on the FPGA and the order of the B+-tree take an impact on the whole hybrid system. The results show that the computation time of the software system can be halved.

AB - In this paper we present a hybrid index structure which is allocated in a Field Programmable Gate Array (FPGA) and a traditional CPU-based host system. The used index structure of this system is a B+-tree which is a common index used in disk based databases. The hybrid index is divided into two parts. The lower levels of the B+-tree, especially the leaves where the values are stored, are located on the host system while the root and the most upper levels with the interior nodes are stored on the FPGA. We speed up the search in the upper levels of our hybrid index by applying an FPGA accelerated parallel search. In the evaluation we show how the amount of keys inside the interior nodes on the FPGA and the order of the B+-tree take an impact on the whole hybrid system. The results show that the computation time of the software system can be halved.

UR - https://www.researchgate.net/publication/308805617_Hybrid_FPGA_approach_for_a_B_tree_in_a_Semantic_Web_database_system

U2 - 10.1109/ReCoSoC.2015.7238093

DO - 10.1109/ReCoSoC.2015.7238093

M3 - Conference contribution

SN - 978-1-4673-7941-0

T3 - International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)

SP - 1

EP - 8

BT - 2015 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)

PB - IEEE

T2 - 2015 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)

Y2 - 29 June 2015 through 1 July 2015

ER -

Heinrich D, Werner S, Stelzner M , Blochwitz C, Pionteck T, Groppe S. Hybrid FPGA approach for a B+ tree in a Semantic Web database system. in 2015 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC). IEEE. 2015. S. 1-8. (International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)). doi: 10.1109/ReCoSoC.2015.7238093

Hybrid FPGA approach for a B+ tree in a Semantic Web database system

Abstract

Strategische Forschungsbereiche und Zentren

DFG-Fachsystematik

UN SDGs

Dokumente

Weitere Links

Fingerprint

Projekte

Hardwarebeschleunigung von Semantic Web Datenbanken durch dynamisch rekonfigurierbare FPGAs

Zitieren