Abstract
. In this tutorial, we present a comprehensive approach to non-intrusive monitoring of multi-core processors. Modern multi-core processors come with trace-ports that provide a highly compressed trace of the instructions executed by the processor. We describe how these compressed traces can be used to reconstruct the actual control flow trace executed by the program running on the processor and to carry out analyses on the control flow trace in real time using FPGAs. We further give an introduction to the temporal stream-based specification language TeSSLa and show how it can be used to specify typical constraints of a cyber-physical system from the railway domain. Finally, we describe how light-weight, hardware-supported instrumentation can be used to enrich the control-flow trace with data values from the application.
Originalsprache | Englisch |
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Titel | RV 2018: Runtime Verification |
Redakteure/-innen | Christian Colombo, Martin Leucker |
Seitenumfang | 21 |
Band | 11237 |
Herausgeber (Verlag) | Springer, Cham |
Erscheinungsdatum | 08.11.2019 |
Seiten | 43-63 |
ISBN (Print) | 978-3-030-03768-0 |
ISBN (elektronisch) | 978-3-030-03769-7 |
DOIs | |
Publikationsstatus | Veröffentlicht - 08.11.2019 |
Veranstaltung | 18th International Conference on Runtime Verification - Limassol, Zypern Dauer: 10.11.2018 → 13.11.2018 Konferenznummer: 227239 |