DynaCORE - A Dynamically Reconfigurable Coprocessor Architecture for Network Processors

Carsten Albrecht; Jürgen Foag; Roman Koch; Erik Maehle

doi:10.1109/PDP.2006.30

DynaCORE - A Dynamically Reconfigurable Coprocessor Architecture for Network Processors

Carsten Albrecht, Jürgen Foag, Roman Koch, Erik Maehle

Institut für Technische Informatik

Radiocommunications Systems Division

15 Zitate (Scopus)

Abstract

Network processors are special purpose processors, tailored to the needs of packet processing in internet routers. Network processors are, in general, freely programmable devices. However, their performance in payloadprocessing relies on specific tasks to be accelerated by fixed purpose coprocessors which are integrated into the device. As a solution to overcome the restrictions of flexibility, a dynamically adaptable coprocessor based on dynamically and partially reconfigurable logic (DynaCORE) is proposed.

Originalsprache	Englisch
Titel	14th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP'06)
Seitenumfang	8
Herausgeber (Verlag)	IEEE
Erscheinungsdatum	26.10.2006
Seiten	101-108
Aufsatznummer	1613259
ISBN (Print)	0-7695-2513-X
DOIs	https://doi.org/10.1109/PDP.2006.30
Publikationsstatus	Veröffentlicht - 26.10.2006
Veranstaltung	14th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing - Montbeliard-Sochaux , Frankreich Dauer: 15.02.2006 → 17.02.2006 Konferenznummer: 68364

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10.1109/PDP.2006.30

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https://www.scopus.com/pages/publications/33750215907

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Albrecht, C., Foag, J., Koch, R., & Maehle, E. (2006). DynaCORE - A Dynamically Reconfigurable Coprocessor Architecture for Network Processors. in 14th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP'06) (S. 101-108). Artikel 1613259 ( Euromicro International Conference on Parallel, Distributed, and Network-Based Processing). IEEE. https://doi.org/10.1109/PDP.2006.30

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title = "DynaCORE - A Dynamically Reconfigurable Coprocessor Architecture for Network Processors",

abstract = "Network processors are special purpose processors, tailored to the needs of packet processing in internet routers. Network processors are, in general, freely programmable devices. However, their performance in payloadprocessing relies on specific tasks to be accelerated by fixed purpose coprocessors which are integrated into the device. As a solution to overcome the restrictions of flexibility, a dynamically adaptable coprocessor based on dynamically and partially reconfigurable logic (DynaCORE) is proposed.",

author = "Carsten Albrecht and J{\"u}rgen Foag and Roman Koch and Erik Maehle",

year = "2006",

month = oct,

day = "26",

doi = "10.1109/PDP.2006.30",

language = "English",

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series = " Euromicro International Conference on Parallel, Distributed, and Network-Based Processing",

publisher = "IEEE",

pages = "101--108",

booktitle = "14th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP'06)",

note = "14th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing, PDP 2006 ; Conference date: 15-02-2006 Through 17-02-2006",

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Albrecht, C, Foag, J, Koch, R & Maehle, E 2006, DynaCORE - A Dynamically Reconfigurable Coprocessor Architecture for Network Processors. in 14th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP'06)., 1613259, Euromicro International Conference on Parallel, Distributed, and Network-Based Processing, IEEE, S. 101-108, 14th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing, Montbeliard-Sochaux , Frankreich, 15.02.06. https://doi.org/10.1109/PDP.2006.30

DynaCORE - A Dynamically Reconfigurable Coprocessor Architecture for Network Processors. / Albrecht, Carsten; Foag, Jürgen; Koch, Roman et al.
14th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP'06). IEEE, 2006. S. 101-108 1613259 ( Euromicro International Conference on Parallel, Distributed, and Network-Based Processing).

Publikation: Kapitel in Büchern/Berichten/Konferenzbänden › Konferenzbeitrag › Begutachtung

TY - GEN

T1 - DynaCORE - A Dynamically Reconfigurable Coprocessor Architecture for Network Processors

AU - Albrecht, Carsten

AU - Foag, Jürgen

AU - Koch, Roman

AU - Maehle, Erik

N1 - Conference code: 68364

PY - 2006/10/26

Y1 - 2006/10/26

N2 - Network processors are special purpose processors, tailored to the needs of packet processing in internet routers. Network processors are, in general, freely programmable devices. However, their performance in payloadprocessing relies on specific tasks to be accelerated by fixed purpose coprocessors which are integrated into the device. As a solution to overcome the restrictions of flexibility, a dynamically adaptable coprocessor based on dynamically and partially reconfigurable logic (DynaCORE) is proposed.

AB - Network processors are special purpose processors, tailored to the needs of packet processing in internet routers. Network processors are, in general, freely programmable devices. However, their performance in payloadprocessing relies on specific tasks to be accelerated by fixed purpose coprocessors which are integrated into the device. As a solution to overcome the restrictions of flexibility, a dynamically adaptable coprocessor based on dynamically and partially reconfigurable logic (DynaCORE) is proposed.

UR - https://www.scopus.com/pages/publications/33750215907

U2 - 10.1109/PDP.2006.30

DO - 10.1109/PDP.2006.30

M3 - Conference contribution

SN - 0-7695-2513-X

T3 - Euromicro International Conference on Parallel, Distributed, and Network-Based Processing

SP - 101

EP - 108

BT - 14th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP'06)

PB - IEEE

T2 - 14th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing

Y2 - 15 February 2006 through 17 February 2006

ER -

Albrecht C, Foag J, Koch R, Maehle E. DynaCORE - A Dynamically Reconfigurable Coprocessor Architecture for Network Processors. in 14th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP'06). IEEE. 2006. S. 101-108. 1613259. ( Euromicro International Conference on Parallel, Distributed, and Network-Based Processing). doi: 10.1109/PDP.2006.30

DynaCORE - A Dynamically Reconfigurable Coprocessor Architecture for Network Processors

Abstract

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