DynaCORE - A Dynamically Reconfigurable Coprocessor Architecture for Network Processors

Carsten Albrecht, Jürgen Foag, Roman Koch, Erik Maehle

Abstract

Network processors are special purpose processors, tailored to the needs of packet processing in internet routers. Network processors are, in general, freely programmable devices. However, their performance in payloadprocessing relies on specific tasks to be accelerated by fixed purpose coprocessors which are integrated into the device. As a solution to overcome the restrictions of flexibility, a dynamically adaptable coprocessor based on dynamically and partially reconfigurable logic (DynaCORE) is proposed.

OriginalspracheEnglisch
Titel14th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP'06)
Seitenumfang8
Herausgeber (Verlag)IEEE
Erscheinungsdatum26.10.2006
Seiten101-108
Aufsatznummer1613259
ISBN (Print)0-7695-2513-X
DOIs
PublikationsstatusVeröffentlicht - 26.10.2006
Veranstaltung14th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing - Montbeliard-Sochaux , Frankreich
Dauer: 15.02.200617.02.2006
Konferenznummer: 68364

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