Differential Cache-Collision Timing Attacks on AES with Applications to Embedded CPUs

Andrey Bogdanov; Thomas Eisenbarth; Christof Paar; Malte Wienecke

doi:10.1007/978-3-642-11925-5_17

Differential Cache-Collision Timing Attacks on AES with Applications to Embedded CPUs

Andrey Bogdanov, Thomas Eisenbarth, Christof Paar, Malte Wienecke

Institut für IT-Sicherheit

47 Zitate (Scopus)

Abstract

This paper proposes a new type of cache-collision timing attacks on software implementations of AES. Our major technique is of differential nature and is based on the internal cryptographic properties of AES, namely, on the MDS property of the linear code providing the diffusion matrix used in the MixColumns transform. It is a chosen-plaintext attack where pairs of AES executions are treated differentially. The method can be easily converted into a chosen-ciphertext attack. We also thoroughly study the physical behavior of cache memory enabling this attack.

Originalsprache	Englisch
Titel	Topics in Cryptology - CT-RSA 2010
Redakteure/-innen	Josef Pieprzyk
Seitenumfang	17
Band	5985
Erscheinungsort	Berlin, Heidelberg
Herausgeber (Verlag)	Springer Berlin Heidelberg
Erscheinungsdatum	03.2010
Seiten	235-251
ISBN (Print)	978-3-642-11924-8
ISBN (elektronisch)	978-3-642-11925-5
DOIs	https://doi.org/10.1007/978-3-642-11925-5_17
Publikationsstatus	Veröffentlicht - 03.2010
Veranstaltung	The Cryptographers’ Track at the RSA Conference 2010 - San Francisco, USA / Vereinigte Staaten Dauer: 01.03.2010 → 05.03.2010

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10.1007/978-3-642-11925-5_17

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@inproceedings{5fe170b103924462b986202c1ffdd7cd,

title = "Differential Cache-Collision Timing Attacks on AES with Applications to Embedded CPUs",

abstract = "This paper proposes a new type of cache-collision timing attacks on software implementations of AES. Our major technique is of differential nature and is based on the internal cryptographic properties of AES, namely, on the MDS property of the linear code providing the diffusion matrix used in the MixColumns transform. It is a chosen-plaintext attack where pairs of AES executions are treated differentially. The method can be easily converted into a chosen-ciphertext attack. We also thoroughly study the physical behavior of cache memory enabling this attack.",

author = "Andrey Bogdanov and Thomas Eisenbarth and Christof Paar and Malte Wienecke",

year = "2010",

month = mar,

doi = "10.1007/978-3-642-11925-5\_17",

language = "English",

isbn = "978-3-642-11924-8",

volume = "5985",

series = "Lecture Notes in Computer Science",

publisher = "Springer Berlin Heidelberg",

pages = "235--251",

editor = "Josef Pieprzyk",

booktitle = "Topics in Cryptology - CT-RSA 2010",

note = "The Cryptographers{\textquoteright} Track at the RSA Conference 2010 ; Conference date: 01-03-2010 Through 05-03-2010",

}

Bogdanov, A, Eisenbarth, T, Paar, C & Wienecke, M 2010, Differential Cache-Collision Timing Attacks on AES with Applications to Embedded CPUs. in J Pieprzyk (Hrsg.), Topics in Cryptology - CT-RSA 2010. Bd. 5985, Lecture Notes in Computer Science, Bd. 5985, Springer Berlin Heidelberg, Berlin, Heidelberg, S. 235-251, The Cryptographers’ Track at the RSA Conference 2010, San Francisco, California, USA / Vereinigte Staaten, 01.03.10. https://doi.org/10.1007/978-3-642-11925-5_17

Differential Cache-Collision Timing Attacks on AES with Applications to Embedded CPUs. / Bogdanov, Andrey; Eisenbarth, Thomas; Paar, Christof et al.
Topics in Cryptology - CT-RSA 2010. Hrsg. / Josef Pieprzyk. Band 5985 Berlin, Heidelberg: Springer Berlin Heidelberg, 2010. S. 235-251 (Lecture Notes in Computer Science; Band 5985).

Publikation: Kapitel in Büchern/Berichten/Konferenzbänden › Konferenzbeitrag › Begutachtung

TY - GEN

T1 - Differential Cache-Collision Timing Attacks on AES with Applications to Embedded CPUs

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AU - Paar, Christof

AU - Wienecke, Malte

PY - 2010/3

Y1 - 2010/3

N2 - This paper proposes a new type of cache-collision timing attacks on software implementations of AES. Our major technique is of differential nature and is based on the internal cryptographic properties of AES, namely, on the MDS property of the linear code providing the diffusion matrix used in the MixColumns transform. It is a chosen-plaintext attack where pairs of AES executions are treated differentially. The method can be easily converted into a chosen-ciphertext attack. We also thoroughly study the physical behavior of cache memory enabling this attack.

AB - This paper proposes a new type of cache-collision timing attacks on software implementations of AES. Our major technique is of differential nature and is based on the internal cryptographic properties of AES, namely, on the MDS property of the linear code providing the diffusion matrix used in the MixColumns transform. It is a chosen-plaintext attack where pairs of AES executions are treated differentially. The method can be easily converted into a chosen-ciphertext attack. We also thoroughly study the physical behavior of cache memory enabling this attack.

UR - https://www.researchgate.net/publication/221208326_Differential_Cache-Collision_Timing_Attacks_on_AES_with_Applications_to_Embedded_CPUs

U2 - 10.1007/978-3-642-11925-5_17

DO - 10.1007/978-3-642-11925-5_17

M3 - Conference contribution

SN - 978-3-642-11924-8

VL - 5985

T3 - Lecture Notes in Computer Science

SP - 235

EP - 251

BT - Topics in Cryptology - CT-RSA 2010

A2 - Pieprzyk, Josef

PB - Springer Berlin Heidelberg

CY - Berlin, Heidelberg

T2 - The Cryptographers’ Track at the RSA Conference 2010

Y2 - 1 March 2010 through 5 March 2010

ER -

Differential Cache-Collision Timing Attacks on AES with Applications to Embedded CPUs

Abstract

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