A SSE-Based Implementation of a Ray Tracer for the Comparision with Coprocessors in Hybrid Computing Systems

Volker Hampel, Erik Maehle

Abstract

: In this paper we present and discuss our efforts to accelerate a sample application by using the Streaming SIMD Extensions (SSE) to the x64 instruction set. Several approaches to their integration into the source code are tested and evaluated against each other. They are assembler intrinsics, the initial source code combined with different compiler flags, and enhanced code for better SSE inference. Their performances are compared to benchmarks from two hybrid computing systems, which use a Field Programmable Gate Array (FPGA) and a Graphics Processing Unit (GPU), respectively. As the interfaces to manipulated/accelerated code sections are the same in all cases, comparability always is maintained.
OriginalspracheEnglisch
Seiten131-140
Seitenumfang10
PublikationsstatusVeröffentlicht - 2011
Veranstaltung 24th PARS - Workshop on Parallel Systems and Algorithms - Rüschlikon, Schweiz
Dauer: 26.05.201127.05.2011

Tagung, Konferenz, Kongress

Tagung, Konferenz, Kongress 24th PARS - Workshop on Parallel Systems and Algorithms
Land/GebietSchweiz
OrtRüschlikon
Zeitraum26.05.1127.05.11

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